πŸŽ“ Electrical Engineering, Universitas Tanjungpura (UNTAN)

Democratizing Edge AI & Grounded Semantic RAG

Building lightweight machine learning pipelines for resource-constrained hardware (<200KB model, <100KB RAM) alongside privacy-first local Retrieval-Augmented Generation architectures with verifiable citations and Schema.org Linked Data.

⚑ TinyML & Renewables

Inverter Fault Diagnosis

ESP32-S3 INT8 1D-CNN
πŸ“š Privacy-First

Local Document RAG

~2GB RAM Footprint
πŸ•ΈοΈ Semantic Web

Knowledge Graph Studio

Schema.org JSON-LD
LIVE TELEMETRY: Inverter Waveform Monitor 50 Hz
Mode: Normal (Sinusoidal)
Frequency: 50.0 Hz
THD Sim: < 2.1%
Open Source & Research

Featured Projects

System engineering architectures designed for computational efficiency, modularity, and scientific transparency.

Knowledge Graph & Neural RAG v2.0 Released Apache-2.0

CorpusLD

Enterprise Knowledge Graph + Multi-Agent Neural RAG Studio

An academic knowledge partner transforming unstructured PDF documents into Schema.org JSON-LD Knowledge Graphs that achieve 100% compliance on validator.schema.org and pass Google Rich Results tests.

Parser Pipeline 4-Tier Fallback (LlamaParse → Unstructured → PyPDF → Stateful Table Stitcher)
Multi-Agent Core 5-Agent Stepped RAG (Metadata, Outline, Metrics, UniversalTable, Citations)
Adversarial KG Automated conflict detection for antonyms, negations, and numerical boundaries
Precision Citations Dual Page Identity (machine PDF index + human printed page numbers like "Hal. 205")
Python FastAPI Qdrant Vector DB IBM Granite Embedding Ollama Schema.org JSON-LD
View GitHub Repository
Pipeline Architecture Map 100% Schema.org
01
PDF Ingestion 4-Tier Hybrid Parser
02
5-Agent Extraction Stateful Table Stitcher
03
Adversarial Reasoning Conflict Detection & Audit
04
Schema.org JSON-LD Google Rich Results Ready
Privacy-First Local RAG Active Development MIT License

Notebook-LocalLM-Studio

Edge-Optimized & Self-Reflective Local RAG for Multi-Document Intelligence

An enterprise-grade, offline Retrieval-Augmented Generation workspace engineered to process, synthesize, and answer queries across multiple PDF documents locally within a strict ~2GB RAM target.

SLM Core Qwen 2.5 1.5B Instruct (Q5_K_M Quantization ~1.2GB) via Ollama
Embedding Engine paraphrase-multilingual-MiniLM-L12-v2 (384-dim dense vectors)
Hybrid Re-Search Deterministic heuristic table evaluator → Secondary Targeted Query
Citation Guardrails Strict multi-document evidence citations [Doc.pdf | Page X] preventing hallucinations
Python Streamlit Qdrant Ollama Qwen 2.5 1.5B MiniLM-L12-v2 pypdf
View GitHub Repository
Target Memory Footprint (~2GB RAM) Zero OOM
Model 1.2GB
DB 250MB
App 350MB
Free
Qwen 2.5 1.5B Q5_K_M (~1.2GB)
Qdrant Local Vector Client (~250MB)
Multilingual Embedding & Buffer (~350MB)
System Headroom (~200MB)
TinyML & Edge Hardware Thesis Project MIT License

Lightweight 1D-CNN Edge AI for Inverter Fault Diagnosis

Real-time Open-Circuit Fault Detection on ESP32-S3 for Solar PV Inverters

An embedded fault diagnosis system for single-phase full-bridge inverters powered by a lightweight 1D-CNN running directly on the ESP32-S3 without cloud or GPU dependencies.

πŸ”¬ Research Stage & Scientific Transparency:

End-to-end pipeline (acquisition → training → INT8 quantization → TFLite Micro → ESP32-S3) is validated. Physical hardware testbed dataset acquisition is the next scheduled milestone.

Model Size (INT8) 21.5 KB quantized (<15k params, TFLite Micro)
Input Window & Classes 128 samples / window • 6 Fault Classes (S1-S4 + Multi)
RAM Footprint < 100 KB RAM Tensor Arena on ESP32-S3
Inference Latency ~8.4 ms on 240 MHz Xtensa LX7 dual-core
ESP32-S3 TensorFlow TFLite Micro INT8 Quantization C / C++ Thinger.io IoT
View GitHub Repository
Deployment Topology TFLite Micro
β˜€οΈ PV Inverter Full-Bridge AC
→ [Current Sensor] →
πŸ“Ÿ ESP32-S3 1D-CNN INT8 Core
→ [WiFi / Telemetry] →
πŸ“Š Monitoring Thinger.io Dashboard
Model Size < 200 KB
RAM Usage < 100 KB
Target Savings ~85% Cheaper
Hands-On System Simulation

Interactive Engineering Lab

Directly test multi-agent RAG pipelines, schema generation, and real-time edge inverter fault detection in your browser.

CorpusLD Semantic Engine : Multi-Agent Step Simulator Agent State Machine : Active
Agent 1: Cover & Metadata Extractor Execution: 0.003s
/* Loading Agent Output... */
βœ“ Schema.org Compliance: 100% Passed (0 Critical Errors, Google Rich Results Ready)
Core Competencies

Technical Radar & Stack

Practical, battle-tested expertise across embedded TinyML, vector retrieval systems, and semantic web engineering.

⚑

Embedded & TinyML

Edge Intelligence & IoT
  • ESP32-S3 Microcontroller Advanced
  • TFLite Micro & INT8 Quantization Advanced
  • 1D-CNN Signal Processing Core Focus
  • C / C++ Embedded & Arduino Proficient
  • Thinger.io Cloud Telemetry Proficient
🧠

Neural RAG & SLM

Small Language Models & Vectors
  • Qdrant Vector Database Advanced
  • Ollama Offline SLM Inference Advanced
  • Qwen 2.5 / MiniLM Embedding Advanced
  • Multi-Agent RAG Orchestration Architect
  • Stateful Table Stitching Proprietary
πŸ•ΈοΈ

Semantic Web & API

Knowledge Graphs & Systems
  • Schema.org & JSON-LD Expert 100%
  • Python 3.10+ & FastAPI Advanced
  • Streamlit Interactive UI Advanced
  • TypeScript / JavaScript Intermediate
  • LlamaParse & Unstructured Proficient
βš™οΈ

Tooling & Research

Workflows & Benchmarking
  • Git & GitHub Version Control Daily Driver
  • Docker & Containerization Working
  • VS Code / Linux CLI Advanced
  • Scientific Writing & IEEE Format Academic
  • PyTest & RAGAS Framework Roadmap
Timeline & Execution

Research Roadmap 2026 - 2027

Structured roadmap covering undergraduate thesis execution, scientific publication, and open-source productionization.

Phase 1
Q1 - Q3 2026

Architecture & End-to-End Pipeline Validation

Completed 1D-CNN INT8 pipeline for ESP32-S3, released CorpusLD v2.0 with 100% Schema.org compliance, and built Notebook-LocalLM-Studio sub-2GB RAM workspace.

βœ“ CorpusLD v2.0 βœ“ INT8 TFLite Micro Pipeline βœ“ 2-Pass Retrieval Engine
Phase 2
Q4 2026 : Current Focus

Thesis Completion & Physical Dataset Acquisition

Physical Open-Circuit Fault dataset acquisition on laboratory hardware testbed / physical circuit simulations, robustness validation, and scientific paper submission.

• Hardware Testbed Acquisition • Scientific Paper Finalization
Phase 3
2027 : Planned

RAG Productionization & CorpusLD v2.1

Production-grade Docker containerization, automated benchmarking with RAGAS evaluation harness, PyTest suite, and CI/CD pipelines.

• Docker Deployment • RAGAS Benchmarking Suite • CorpusLD v2.1
Interactive Terminal

Developer Console & CLI

Type interactive shell commands to explore projects, trigger system simulators, or inspect live linked data.

sharriffajar@untan-edge-lab: ~ (bash / web-cli) Type help for available commands
INFO: Type help to view available commands.
Get in Touch

Collaboration & Contact

Open to research collaborations, open-source initiatives, TinyML implementations, or AI engineering opportunities.

πŸ“§
Direct Email sharrifff880@gmail.com
Open Email Client
πŸ™
GitHub Profile github.com/sharriffajar
πŸ’Ό
LinkedIn Profile linkedin.com/in/sharriffajar
πŸ›οΈ
Academic Affiliation Universitas Tanjungpura (UNTAN), Pontianak, Indonesia

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Structured Knowledge Graph Implementation of this Page
100% Schema.org Valid @graph : 7 Linked Entities
/* Loading Live Linked Data... */